This invention relates to a method of manufacture of a semiconductor device, and more particularly to a novel method of ion implanting atoms capable of gettering defects into the surface of one conductivity type region for the purpose of improving semiconductor integrated circuit yields and reliability by minimizing leakage current at the junction and the surface.
Referring to metal-oxide-semiconductor integrated circuits (MOS IC) devices, there is a trend in the industry to form source and drain regions shallow for the purpose of increasing packing density, for example 64 K bits in the case of a MOS memory. To keep pace therewith, the impurity material used is now being changed from phosphorus (P) to arsenic (As), and ion implantation is replacing thermal diffusion for introducing the impurity material into the semiconductor substrate. Arsenic has a larger nuclear radius than phosphorus, the nuclear radius being proportional to the mass number and the mass number of arsenic being larger than that of phosphorus. It may be the consequence of this that the damage to the semiconductor substrate is considerable when arsenic is ion implanted instead of phosphorus. Defects are caused to be generated thereby, and characteristics of semiconductor devices are deteriorated; for example, a large leakage current is observed when a reverse bias is applied.
These defects may be decreased by subsequent heat treatment of the semiconductor substrate, but some defects still remain and exert an adverse infuence on the characteristics of the semiconductor device. As is well known to the person skilled in the art, dynamic memory uses capacitors, usually the capacitors of MOS field effect transistors, to store bits of data at the rate of one bit per capacitor (FIG. 3). With such MOS memories, the capacitors must be recharged periodically to prevent data loss due to leakage. It is better if the interval (refresh time) of this recharging, which is called refreshing, is longer. Thus, the less the leakage, the longer the refresh time. Likewise, a dynamic memory uses a number of MOS circuits in series, with the capacitor as the storage element, one capacitor being needed per bit.
For the purpose of minimizing leakage current between two predetermined mixed conductivity type regions of the semiconductor device, a method of ion implanting arsenic through an oxide layer (e.g., a layer of silicon dioxide) formed on the surface of a semiconductor substrate has been proposed, instead of ion implanting arsenic directly, which proposed method is effective in minimizing the leakage current. This is understood to be due to the knock on effect of oxygen, that is, the oxygen atom in the layer of silicon dioxide is dislodged from a silicon atom by ion implantation of arsenic and is driven into the semiconductor substrate. The inventors then conceived of ion implanting oxygen directly into the semiconductor substrate, and carried on a number of experiments and achieved satisfactory results as will be described hereinafter.
A gettering method recently developed is illustrated in FIGS. 1A to 1C which are cross-sectional views of the steps to carry out such method. In this method, a field oxide layer 12 is formed on a p-type silicon semiconductor substrate 11 by selective oxidizing technique, a gate insulating layer 13 of silicon dioxide and a gate electrode 14 of polycrystalline silicon are formed in the active region as shown in FIG. 1A in accordance with a conventional technique for fabricating MOS devices. Arsenic ions As.sup.+ are ion implanted as illustrated in FIG. 1B to form shallow N.sup.+ type source and N.sup.+ type drain regions 15, 16, each less than 1 .mu.m deep. According to the method, oxygen ions O.sup.+ are ion implanted as depicted in FIG. 1C, and oxygen ions thus driven into the semiconductor substrate are illustrated by x marks. It is understood that oxygen driven into the semiconductor substrate has a pinning effect, that is, oxygen takes in or absorbs such lattice defects as recombination centers and functions to getter defects, thereby prolonging carrier lifetime. Experiments confirmed that with the shallow junction into which oxygen has been driven, leakage current is low when reverse bias is applied, which shows that characteristics of the junction are improved. However, the method does not solve the problem of surface leakage.
Where oxygen ions are ion implanted as shown in FIG. 1C, they are driven into parts where source and drain regions are in contact with oxide layers 12 and 13, which is believed to be the cause of surface leakage current.
A specific prior art pertinent to the present invention is U.S. Pat. No. 4,069,068 granted to Beyer et al. In the invention disclosed therein, an emitter area is formed in a silicon nitride layer on a silicon dioxide layer. Through this window, ions of argon for gettering defects are implanted in the surface of the base region as shown in FIG. 2. Next, using the same window, the silicon dioxide layer in the emitter area window is removed, and then, as shown in FIG. 3, the n.sup.+ type emitter region is formed by thermally diffusing the n.sup.+ type impurities through the window. Finally, a metallized emitter contact is formed.
It is clear from the foregoing that the very same window is used for implantation of gettering materials and diffusion of impurities. The inventors of the present invention reasoned that nucleation sites may remain near the emitter-base junction of FIG. 3, tending to increase leakage current at or near the surface of the n.sup.+ type emitter region defined by the window.